Name: Hardware Algorithm Implementation for Mission Specific Processing (en Inglés)
Price: 307.24 PEN
Availability: InStock
Author: Shirley, Jason W.
ISBN: 9781288405497

portada Hardware Algorithm Implementation for Mission Specific Processing (en Inglés)

Formato

Libro Físico

Autor

Jason W. Shirley

Editorial

Biblioscholar

Idioma

Inglés

N° páginas

146

Encuadernación

Tapa Blanda

Dimensiones

24.6 x 18.9 x 0.8 cm

Peso

0.27 kg.

ISBN13

9781288405497

Categorías

Educación

Hardware Algorithm Implementation for Mission Specific Processing (en Inglés)

Jason W. Shirley (Autor) · Biblioscholar · Tapa Blanda

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Origen: Estados Unidos (Costos de importación incluídos en el precio)

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Reseña del libro "Hardware Algorithm Implementation for Mission Specific Processing (en Inglés)"

There is a need to expedite the process of designing military hardware to stay ahead of the adversary. The core of this project was to build reusable, synthesizeable libraries to make this a possibility. In order to build these libraries, Matlab commands and functions, such as Conv2, Round, Floor, Pinv, etc., had to be converted into reusable VHDL modules. These modules make up reusable libraries for the Mission Specific Process (MSP) which will support AFRL/RY. The MSP allows the VLSI design process to be completed in a mere matter of days or months using an FPGA or ASIC design, as opposed to the current way of developing a system which can take 1-2 years to complete. By having the libraries built, the components can be implemented in an FPGA or ASIC design over and over again. The libraries make it possible to make upgrades to weapons systems to meet the ever-changing needs the War Fighter faces. MSP makes it possible to develop various algorithms, including algorithms implemented in Matlab. The MSP libraries were built and tested using TSMC 250-nm technology library from the Taiwan Semiconductor Manufacturing Company. They were also synthesized for an FPGA. The modules were all synthesized using the CAD tools from Cadence and Mentor Graphics. Power, area, and delay results for each module were presented.